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Effects of fin height of tapered FinFETs on the sub-22nm System on Chip (SoC) application using TCAD simulation

Title
Effects of fin height of tapered FinFETs on the sub-22nm System on Chip (SoC) application using TCAD simulation
Authors
백록현손창우강창용고명동박찬훈김성호정의영이정수P.KirschR.JammyJ.C.Lee정윤하
POSTECH Authors
백록현
Date Issued
22-Apr-2013
Publisher
IEEE
URI
http://oasis.postech.ac.kr/handle/2014.oak/49473
Article Type
Conference
Citation
IEEE VLSI-TSA (2013), 2013-04-22
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 BAEK, ROCK HYUN
Dept of Electrical Enginrg
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