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전원 회로 노이즈 분석을 위한 Model Order Reduction기법의 비교 분석

Title
전원 회로 노이즈 분석을 위한 Model Order Reduction기법의 비교 분석
Authors
김영환김진욱
POSTECH Authors
김영환
Date Issued
16-May-2009
Publisher
대한전자공학회
URI
http://oasis.postech.ac.kr/handle/2014.oak/45979
Article Type
Conference
Citation
대한전자공학회 SoC 설계연구회학술발표회, page. 138 - 141, 2009-05-16
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