Open Access System for Information Sharing

Login Library

 

Article
Cited 5 time in webofscience Cited 6 time in scopus
Metadata Downloads

A new physical 1/f noise model for double stack high-k gate dielectric MOSFETs

Title
A new physical 1/f noise model for double stack high-k gate dielectric MOSFETs
Authors
Song, SHChoi, HSBaek, RHChoi, GBPark, MSLee, KTSagong, HCLee, SHJung, SWKang, CYJeong, YH
POSTECH Authors
Baek, RH
Date Issued
Dec-2009
Publisher
IEEE
Abstract
In this letter, a new physical 1/f noise model is developed for double-stack high-k dielectric MOSFETs. This new model modifies the trapping-time-constant term in multistack unified noise model. Conventional 1/f noise model is built on the simple square potential approximation which did not account the electric field dependence on trapping time constant. The new model takes into account of a resultant tunneling process from the actual sloped potential in order to eliminate the discrepancies of dielectric trap density on the dielectric thickness and the gate bias. Our model successfully predicts 1/f noise data obtained from SiO2/HfO2 double-stack high-k devices with various gate-dielectric thicknesses using a single set of modeling parameter.
URI
http://oasis.postech.ac.kr/handle/2014.oak/27759
DOI
10.1109/LED.2009.2033721
ISSN
0741-3106
Article Type
Article
Citation
IEEE ELECTRON DEVICE LETTERS, vol. 30, no. 12, page. 1365 - 1367, 2009-12
Files in This Item:
There are no files associated with this item.

qr_code

  • mendeley

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

Related Researcher

Researcher

 BAEK, ROCK HYUN
Dept of Electrical Enginrg
Read more

Views & Downloads

Browse