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A Crosstalk-and-ISI Equalizing Receiver in 2-Drop Single-Ended SSTL Memory Channel

Title
A Crosstalk-and-ISI Equalizing Receiver in 2-Drop Single-Ended SSTL Memory Channel
Authors
Bae, JHSohn, YSBae, SJPark, KIChoi, JSJun, YHSim, JYPark, HJ박홍준
Date Issued
Jan-2010
Publisher
IEEE
Abstract
An equalizer circuit which minimizes both crosstalk and ISI is applied to a receiver with a strongly-coupled 2-parallel 2-drop single-ended microstrip SSTL memory channel. The crosstalk equalizer adds a crosstalk-canceling pulse to a victim receiver signal to make the signal crosstalk-free during the transition interval of an incoming signal. A DFE is used for ISI compensation. The equalization of both crosstalk and ISI increases the data rate for BER < 1E-12 from 2.5Gbps to 3.6Gbps with a 0.18 mu m CMOS process.
Keywords
INDUCED JITTER
URI
http://oasis.postech.ac.kr/handle/2014.oak/17534
DOI
10.1109/CICC.2010.5617470
ISSN
0886-5930
Article Type
CONFERENCE PAPER
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