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Fabrication and Characterization of the Power Si-VDMOSFETs

Fabrication and Characterization of the Power Si-VDMOSFETs
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Si-Vertical double-diffused MOSFETs (Si-VDMOSFET) using double-diffused process have been demonstrated. The power MOSFETs require high breakdown voltage characteristic, high current density and low specific on-resistance in harsh condition. To achieve a high breakdown voltage with high drain current, a lightly doped silicon-epitaxial wafer and vertical structure in the Si-VDMOSFETs was adopted. To form a graded doping profile in p-base region, boron ion-implantation using self-align technique (80 keV, 1014/cm2, annealed at 1100℃, 100 min. in N2 atmosphere) was used to obtain a graded doping profile with a surface carrier density of 1018/cm3 was formed. An arsenic ion-implantation (40 keV, 1015/cm2, annealed at 1100℃, 20 min. in N2 atmosphere) was conducted in order to form a source region with a surface carrier density of 1020/cm3. Finally, the channel region with a length of 1.2 m was formed.The breakdown voltage (BV), I-V characteristic and extracted threshold voltage (Vth) of the fabricated device were measured. The BV was measured as high as 170 V for the Si-VDMOSFET with LG= 6 m. The on-state current of 11 mA at VG=VD= 20 V and the off-state current of 1×1015 were measured. The Vth was extracted as high as 9.9 V by using linear extrapolation method, The on-state resistance (Ron) is a crucial parameter in VDMOSFET due to maximum current handling capability limitation of the device. Ron is defined as the total resistance to current flow between the drain and source electrode when a gate bias is applied to turn on the device. The Ron in Si-VDMOSFET was extracted by substituting the conductance (gd) for different gate bias. The minimum Ron (VG= 20 V) was calculated as low as 126 mΩ-cm2. More process optimization in ion-implantation condition are needed for further reducing the Ron characteristics.
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