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Organic field-effect transistors with high-k cyanoethyl pullulan-based gate dielectrics

Organic field-effect transistors with high-k cyanoethyl pullulan-based gate dielectrics
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Organic field-effect transistor (OFET)-based electronics offer unique attractionscompared to conventional inorganic technologies for their low-cost, large-areacoverage and low processing temperatures suitable for flexible electronics. To fullyrealize flexibility aspects in the low-cost OFET technologies, recent interest has alsobeen directed towards the development of polymer-based gate dielectrics that can befabricated via easy solution process. However, technical problems such as highoperatingvoltage, electrical leakage, high curing temperature, low mobility, andhysteresis still exist in the polymer insulated OFETs, restricting their practicalapplications. To understand these issues and improve device properties, we studiedseveral series of gate insulators, such as polyacrylates (PA), cross-linked cyanoethylpullulan (CEP), and bilayer dielectrics consisting of CEP and alumina (Al2O3).In Chapter 1, performance of OFETs with PA copolymer cured at various temperatures as a gate insulator was studied. The chemical changes were monitoredwith FT-IR and the morphology and microstructure of the pentacene layer grown on PAdielectrics were investigated and correlated with OFET device performance. The PAthin film, which was cured at an optimized temperature, showed high dielectricstrength (>7 MV/cm), low leakage current density (5×10-9 A/cm2 at 1 MV/cm) andnegligible hysteresis in OFET. A field-effect mobility (μ) of ~ 0.6 cm2/Vs, on/offcurrent ratio (Ion/Ioff) of ~105 and inverse subthreshold slope (SS) as low as 1.22 V/decwere achieved. The high dielectric strength made it possible to scale down thethickness of dielectric, and low-voltage operation of -5 V was successfully realized.In Chapter 2, performance of OFETs with high-k cross-linked cyanoethylatedpullulan (CLCEP) polymer as a gate dielectric was studied. The optimized film spincoatedfrom the polymer blend showed high dielectric constant (13.4), highcapacitance (53.4 nF/cm2, at 1 MHz), and negligible hysteresis enabling reliable andlow-voltage OFET operations (-3V). With optimized cross-linking temperature, a fieldeffectmobility of 1.32 cm2/Vs, on/off current ratio (Ion/Ioff) of ~ 105 and a thresholdvoltage (Vth) as low as -1.05 V were obtained. Also low SS of 0.089 V/dec wasobtained which is close to the theoretical value of 0.057 V/dec at room temperature.The number of trap states was estimated from threshold voltage shift and SS values,and was confirmed to be related with OH intensities measured with FT-IR. Themorphology and microstructure of the pentacene layer grown on CLCEP dielectricswere also investigated and correlated with OFET device performance.In Chapter 3, the effects of electrical leakage and capacitance density were investigated in low-voltage operated OFETs, and a significant improvement in electrical properties was achieved by compromising the two effects, through insertingan atomic layer deposited (ALD)-Al2O3 thin layer with optimized thickness ~ 5nmbetween gate substrate and the high-k polymeric gate insulator CEP (Ci,CEP/Al2O3 ~ 85nF cm-2). High mobility of ~5 cm2/Vs and sharp SS of 0.066 V/dec were obtained,which are one of the highest μ in pentacene FETs so far, and the lowest SS utilizing anorganic or hybrid dielectric to date. Note that the theoretical minimum SS at roomtemperature is 0.057 V/dec. The smooth dielectric surfaces and 2-dimensional (2D)vertical molecular growth in initial pentacene layers contributed to the highperformance of OFETs as well.In Chapter 4, low voltage-operable (-1 V ~ -5 V) pentacene field-effect transistorswith high performance (μsat ~ 6 cm2/Vs, SS ~ 0.062 V/dec) have been realized,utilizing a high-k cyanoehtylated pullulan/atomic-layer-deposited alumina bilayer gateinsulator. We found that the high performance benefit from the ordered dipoles onpolymer dielectric surface, which might be the first report about the contributiveeffects of ordered polymer dielectric surface dipoles on device performance so far. Theordering originates from secondary interactions, a breakup of which could in turndestruct the ordering and lead to a dramatic drop in field-effect mobility by a factor of~10 (4.91 cm2/Vs to 0.51 cm2/Vs). The interaction and ordering of dipoles wereconfirmed by XPS and NEXAFS
active layer growth and microstructure weredetermined by AFM and XRD. Variations in other interfacial factors such as surfaceroughness, surface energy were found negligible in this study
capacitance density and electrical leakage effect were also excluded as reasons for the dramatic change inelectrical properties.In Chapter 5, low-voltage operable OFETs are fabricated utilizing CEP/cross-linkerblend as a gate insulator. Superior to previous reports, the dielectrics are effectivelycurable at low temperatures of 90 ~ 120 ˚C, below glass transition temperatures ofconventional plastic substrates for flexible electronics. Adopting suberoyl chloride(SCL) as a cross linker, devices exhibit high field-effect mobility μ ~ 8.6 cm2/Vs,on/off current ratio ~ 105 and small SS of 0.099 V/dec. The high μ correlates the wellstacked2D grown initial pentacene layers on the dielectrics with locally wellassociatedsurface dipoles. These dipoles direct well-stacked overgrown pentaceneclusters, which then expand to 2D direction to induce large-area crystallinity. Estergroups as produced from SCL extend the association via “knitting up” the inter-dipolegaps. On the other hand, dangling COOH was produced in EDTAD-cured dielectrics,which disrupts the quasi-order by shielding partial dipoles from direct contact withovergrown molecules to cause discontinuous 3D pentacene grains and diminished μ.OFETs with various cross-linking agent cross-linked CEP as a gate insulator were alsofabricate and the μ trend was correlated with cyano group surface density. Bending testwas also conducted with some devices on flexible substrates.
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