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A Research on Highly Linear and Efficient RF CMOS Power Amplifier

A Research on Highly Linear and Efficient RF CMOS Power Amplifier
Jin, Boshi
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The ever-growing cell phones market has enabled power amplifier (PA) becomes one of the most competitive arenas in RFIC industry. The PA is desired to achieve multi-band and multi-mode operation, and also implement in low cost and highly integrated with other RF blocks in the transmitter. Thus, CMOS process is good candidate to achieve it naturally. However, CMOS PA still has not fully penetrated into the PA world due to the inherent poor performance, such as poor reliability, low Q passive components and conductive substrate. All make the design of fully-integrated PA extremely challenging. In this thesis, some wideband, linearization and efficiency enhancement techniques for transformer-based CMOS PA are studied. Firstly, the basic design issues and approaches about CMOS PA designs are introduced. The transformer design, power cell layout, parameters optimization of power cell and reliability are discussed, respectively. Some bulk power cell solutions are given finally. Secondly, wideband transformer-based CMOS PA design methods are studied. By absorbing the parasitic elements of transformer into the PA’s load impedance matching, the bandwidth of PA is extended significantly. The PA is designed for 2.3-GHz and 2.6-GHz dual band m-WiMAX transmitter in 0.18 ¹m, which can achieve 900 MHz bandwidth and meet the bandwidth sufficiently. Thirdly, the analog pre-distortion technique is employed to enhance the linearity. The power stage is biased at deep Class AB and the driver stage is biased at light Class AB. The harmonics from the two stages can be canceled out at some power regions. Therefore, the net harmonic is suppressed and the linearity is improved, the quiescent current is also reduced and the efficiency is enhanced. Fourthly, the supply modulation effect on linearity of transformer-based CMOS PA is investigated. This effect is caused by the imbalanced structure of transformer. To relieve it, the different matching capacitances at each primary port are employed and RF virtual ground is positioned accurately with EM simulator. With the proposed solutions, AM and PM distortion can be reduced significantly. Finally, the highly efficient saturated CMOS PA is designed. The efficiency at the saturated operation can be enhanced by manipulation of the current and voltage waveforms in the time domain, which only utilizes the non-linear output capacitances without any external matching components. The PA has 29.8 dBm output power with 62% efficiency at 2.45 GHz. In this thesis, all of demonstrated fully-integrated CMOS PAs are fabricated in standard bulk CMOS process except that the SOI CMOS power cell design in Section 2.5. Some of performance, such as bandwidth and efficiency, are the state-of-the-art results.
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