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Browsing by Author Park, HJ

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Issue Date	Title
2017-01	3D printed complex tissue construct using stem cell-laden decellularized extracellular matrix bioinks for cardiac repair link BIOMATERIALS, 112, 264, 274 Jang, J; Park, HJ; Kim, SW; Kim, H; Park, JY; Na, SJ; Kim, HJ; Park, MN; Choi, SH; Park, SH; Kim, SW; Kwon, SM; Kim, PJ; Cho, DW
2011-05	5-Gb/s Peak Detector Using a Current Comparator and a Three-State Charge Pump link IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 58, 5, 269, 273 Kim, JH; Shin, JB; Sim, JY; Park, HJ
2011-05	5-Gb/s Peak Detector Using a Current Comparator and a Three-State Charge Pump link Kim, JH; Shin, JB; Sim, JY; Park, HJ; 심재윤
2014-11	A 0.5-V, 1.47-mu W 40-kS/s 13-bit SAR ADC With Capacitor Error Compensation link IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 61, 11, 840, 844 Ha, H; Lee, SK; Kim, B; Park, HJ; Sim, JY
2014-11	A 0.5-V, 1.47-mu W 40-kS/s 13-bit SAR ADC With Capacitor Error Compensation link Ha, H; Lee, SK; Kim, B; Park, HJ; Sim, JY; 김병섭
2016-02	A 0.65-to-10.5 Gb/s Reference-Less CDR With Asynchronous Baud-Rate Sampling for Frequency Acquisition and Adaptive Equalization link IEEE Transactions on Circuits and SYSTEMS—I: Regular Papers, 63, 2, 276, 2871549-83 Choi, S; Son, H; Shin, J; Lee, SH; Kim, Byungsub; Park, HJ; Sim, JY
2010-12	A 1 GHz ADPLL With a 1.25 ps Minimum-Resolution Sub-Exponent TDC in 0.18 mu m CMOS link IEEE JOURNAL OF SOLID-STATE CIRCUITS, 45, 12, 2874, 2881 Lee, SK; Seo, YH; Park, HJ; Sim, JY
2010-12	A 1 GHz ADPLL With a 1.25 ps Minimum-Resolution Sub-Exponent TDC in 0.18 mu m CMOS link Lee, SK; Seo, YH; Park, HJ; Sim, JY; 박홍준
1999-01	A 1-Gb/s bidirectional I/O buffer using the current-mode scheme IEEE JOURNAL OF SOLID-STATE CIRCUITS, 34, 4, 529, 535 Sim, JY; Sohn, YS; Heo, SC; Park, HJ; Cho, SI
1999-04	A 1-Gb/s bidirectional I/O buffer using the current-mode scheme Sim, JY; Sohn, YS; Heo, SC; Park, HJ; Cho, SI; 심재윤
2012-03	A 1.25 ps Resolution 8b Cyclic TDC in 0.13 mu m CMOS link IEEE JOURNAL OF SOLID-STATE CIRCUITS, 47, 3, 736, 743 Seo, YH; Kim, JS; Park, HJ; Sim, JY
2012-03	A 1.25 ps Resolution 8b Cyclic TDC in 0.13 mu m CMOS link Seo, YH; Kim, JS; Park, HJ; Sim, JY; 박홍준
2012-11	A 1.9-GHz Fractional-N Digital PLL With Subexponent Delta Sigma TDC and IIR-Based Noise Cancellation link IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 59, 11, 721, 725 Jee, DW; Kim, B; Park, HJ; Sim, JY
2012-11	A 1.9-GHz Fractional-N Digital PLL With Subexponent Delta Sigma TDC and IIR-Based Noise Cancellation link Jee, DW; Kim, B; Park, HJ; Sim, JY; 박홍준
2013-03	A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier link IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 60, 3, 142, 146 Suh, Y; Lee, J; Kim, B; Park, HJ; Sim, JY
2013-03	A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier link Suh, Y; Lee, J; Kim, B; Park, HJ; Sim, JY; 김병섭
2011-02	A 110 MHz to 1.4 GHz Locking 40-Phase All-Digital DLL link IEEE JOURNAL OF SOLID-STATE CIRCUITS, 46, 2, 435, 444 Kim, YS; Lee, SK; Park, HJ; Sim, JY
2011-02	A 110 MHz-to-1.4 GHz locking 40-phase all-digital DLL link Kim, YS; Lee, SK; Park, HJ; Sim, JY; 박홍준
2012-04	A 2 GHz Fractional-N Digital PLL with 1b Noise Shaping Delta Sigma TDC link IEEE JOURNAL OF SOLID-STATE CIRCUITS, 47, 4, 875, 883 Jee, DW; Seo, YH; Park, HJ; Sim, JY
2012-04	A 2 GHz Fractional-N Digital PLL with 1b Noise Shaping Delta Sigma TDC link Jee, DW; Seo, YH; Park, HJ; Sim, JY; 박홍준

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