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Issue Date	Title
2017-Jan	3D printed complex tissue construct using stem cell-laden decellularized extracellular matrix bioinks for cardiac repair link BIOMATERIALS, vol. 112, page. 264 - 274, 2017-01 Jang, J; Park, HJ; Kim, SW; Kim, H; Park, JY; Na, SJ; Kim, HJ; Park, MN; Choi, SH; Park, SH; Kim, SW; Kwon, SM; Kim, PJ; Cho, DW
2011-May	5-Gb/s Peak Detector Using a Current Comparator and a Three-State Charge Pump link IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, vol. 58, no. 5, page. 269 - 273, 2011-05 Kim, JH; Shin, JB; Sim, JY; Park, HJ
2014-Nov	A 0.5-V, 1.47-mu W 40-kS/s 13-bit SAR ADC With Capacitor Error Compensation link IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, vol. 61, no. 11, page. 840 - 844, 2014-11 Ha, H; Lee, SK; Kim, B; Park, HJ; Sim, JY
2016-Feb	A 0.65-to-10.5 Gb/s Reference-Less CDR With Asynchronous Baud-Rate Sampling for Frequency Acquisition and Adaptive Equalization link IEEE Transactions on Circuits and SYSTEMS—I: Regular Papers, vol. 63, no. 2, page. 276 - 2871549-83, 2016-02 Choi, S; Son, H; Shin, J; Lee, SH; Kim, Byungsub; Park, HJ; Sim, JY
2010-Dec	A 1 GHz ADPLL With a 1.25 ps Minimum-Resolution Sub-Exponent TDC in 0.18 mu m CMOS link IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 45, no. 12, page. 2874 - 2881, 2010-12 Lee, SK; Seo, YH; Park, HJ; Sim, JY
1999-Jan	A 1-Gb/s bidirectional I/O buffer using the current-mode scheme IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 34, no. 4, page. 529 - 535, 1999-01 Sim, JY; Sohn, YS; Heo, SC; Park, HJ; Cho, SI
2012-Mar	A 1.25 ps Resolution 8b Cyclic TDC in 0.13 mu m CMOS link IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 47, no. 3, page. 736 - 743, 2012-03 Seo, YH; Kim, JS; Park, HJ; Sim, JY
2012-Nov	A 1.9-GHz Fractional-N Digital PLL With Subexponent Delta Sigma TDC and IIR-Based Noise Cancellation link IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, vol. 59, no. 11, page. 721 - 725, 2012-11 Jee, DW; Kim, B; Park, HJ; Sim, JY
2013-Mar	A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier link IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, vol. 60, no. 3, page. 142 - 146, 2013-03 Yunjae Suh; Lee, Jongmi; Kim, Byungsub; Park, HJ; Sim, JY
2011-Feb	A 110 MHz to 1.4 GHz Locking 40-Phase All-Digital DLL link IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 46, no. 2, page. 435 - 444, 2011-02 Young-Sang Kim; Seon-Kyoo Lee; Park, HJ; Sim, JY
2012-Apr	A 2 GHz Fractional-N Digital PLL with 1b Noise Shaping Delta Sigma TDC link IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 47, no. 4, page. 875 - 883, 2012-04 Jee, DW; Seo, YH; Park, HJ; Sim, JY
2016-Feb	A 2 GHz Synthesized Fractional-N ADPLL With Dual-Referenced Interpolating TDC link IEEE Journal of Solid-State Circuits, vol. 51, no. 2, page. 391 - 400, 2016-02 Kim, S; Hong, S; Chang, K; Ju, H; Shin, J; Kim, Byungsub; Park, HJ; Sim, JY
2009-Aug	A 2-Gb/s CMOS Integrating Two-Tap DFE Receiver for Four-Drop Single-Ended Signaling link IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, vol. 56, no. 8, page. 1645 - 1656, 2009-08 Bae, SJ; Chi, HJ; Sohn, YS; Lee, JS; Sim, JY; Park, HJ
2011-Oct	A 2-Gb/s Intrapanel Interface for TFT-LCD With a VSYNC-Embedded Subpixel Clock and a Cascaded Deskew and Multiphase DLL link IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, vol. 58, no. 10, page. 687 - 691, 2011-10 Chi, HJ; Choi, YH; Lee, SM; Sim, JY; Park, HJ; Lim, JJ; Kang, PS; Lee, BY; Hong, JC; Lee, HS
2011-Mar	A 21 fJ/Conversion-Step 100 kS/s 10-bit ADC With a Low-Noise Time-Domain Comparator for Low-Power Sensor Interface link IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 46, no. 3, page. 651 - 659, 2011-03 Lee, SK; Park, SJ; Park, HJ; Sim, JY
2013-Feb	A 300-MS/s, 1.76-ps-Resolution, 10-b Asynchronous Pipelined Time-to-Digital Converter With on-Chip Digital Background Calibration in 0.13-mu m CMOS link IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 48, no. 2, page. 516 - 526, 2013-02 Kim, Jun-Seok; Seo, Young-Hun; Suh, Yunjae; Park, HJ; Sim, JY
2016-Jan	A 40 mV-Differential-Channel-Swing Transceiver Using a RX Current-Integrating TIA and a TX Pre-Emphasis Equalizer With a CML Driver at 9 Gb/s link EEE Transactions on Circuits and Systems I: Regular Papers, vol. 63, no. 1, page. 122 - 133, 2016-01 Il-Min Yi; Soo-Min Lee; Seung-Jun Bae; Young-Soo Sohn; Jung-Hwan Choi; Seong-Jin Jang; Byungsub Kim; Sim, JY; Park, HJ
2014-Dec	A 40-mV-Swing Single-Ended Transceiver for TSV with a Switched-Diode RX Termination link Circuits and Systems II: Express Briefs, IEEE Transactions on, vol. 61, no. 12, page. 987 - 991, 2014-12 Il-Min Yi; Soo-Min Lee; seungjun bae; youngsoo sohn; junghwan choi; Kim, B; Sim, JY; Park, HJ
2013-Sep	A 5 Gb/s Single-Ended Parallel Receiver With Adaptive Crosstalk-Induced Jitter Cancellation link IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 48, no. 9, page. 2118 - 2127, 2013-09 Seon-Kyoo Lee; Kim, B; Park, HJ; Sim, JY
2010-May	A 5 Gb/s Transmitter With a TDR-Based Self-Calibration of Preemphasis Strength link IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, vol. 57, no. 5, page. 379 - 383, 2010-05 Seo, YH; Kim, YS; Park, HJ; Sim, JY

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